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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-09 13:33:39 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-10 03:24:23 +0000 |
| commit | ec558682fc11a985eb1b02b400a86ea9de407796 (patch) | |
| tree | 001c03edc8389648f484e9d36651c222d74fb0fa /src/soc/intel | |
| parent | 2dce9235244c15efa7c34762a0c47b1fa211ffad (diff) | |
aopen/dxplplusu: Move timestamps to common code
First initialisation is already in cpu/intel/car/romstage.c.
Change-Id: If3e5068b4a9981354f0fca5fc12b6b81de1c8f4b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30779
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions