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authorAaron Durbin <adurbin@chromium.org>2016-07-17 23:23:59 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-19 20:16:11 +0200
commitd04639b3d62dbd6a5fc7f48493411b9e74f990d1 (patch)
tree0c68322d752eaf0d65cd03dc0ec54c1bc2a45a8d /src/soc/intel
parenta413e5e455136e6511fd9e5541ff4709d279f7a4 (diff)
drivers/intel/fsp2_0: handle XIP and non-XIP for FSPM component
The previously implementation for loading the FSPM component didn't handle platforms which expects FSPM to be XIP. For the non-XIP case, romstage's address space wasn't fully being checked for overlaps. Lastly, fixup the API as the range_entry isn't needed any longer. This API change requires a apollolake to be updated as well. BUG=chrome-os-partner:52679 Change-Id: I24d0c7d123d12f15a8477e1025bf0901e2d702e7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15741 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/romstage.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 464d5b8f84..da7fcf10b7 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -101,7 +101,6 @@ ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state);
asmlinkage void car_stage_entry(void)
{
- struct range_entry reg_car;
struct postcar_frame pcf;
uintptr_t top_of_ram;
bool s3wake;
@@ -116,11 +115,7 @@ asmlinkage void car_stage_entry(void)
s3wake = fill_power_state(ps) == ACPI_S3;
- /* Make sure the blob does not override our data in CAR */
- range_entry_init(&reg_car, (uintptr_t)_car_relocatable_data_end,
- (uintptr_t)_car_region_end, 0);
-
- if (fsp_memory_init(&reg_car, s3wake) != FSP_SUCCESS) {
+ if (fsp_memory_init(s3wake) != FSP_SUCCESS) {
die("FSP memory init failed. Giving up.");
}