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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-08 19:01:30 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-26 09:14:27 +0000
commit3c18186e76c0e27590f54c3ae39c7b951ac28749 (patch)
tree00ee1696f7701337353529e54a30e63a42f4de36 /src/soc/intel
parent22236a580d45bdd6d7b5f9d2d64f3ddf64f4dd04 (diff)
sb,soc/intel: Refactor power_on_after_fail option
It's only necessary to call get_option() with SLP_TYP S5. Change-Id: Ic821b429a58a2c0713ec338904364ec57bfbcfce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49251 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/pch/smihandler.c28
1 files changed, 15 insertions, 13 deletions
diff --git a/src/soc/intel/broadwell/pch/smihandler.c b/src/soc/intel/broadwell/pch/smihandler.c
index c6632da4fa..542b330221 100644
--- a/src/soc/intel/broadwell/pch/smihandler.c
+++ b/src/soc/intel/broadwell/pch/smihandler.c
@@ -125,13 +125,9 @@ static void backlight_off(void)
printk(BIOS_INFO, "Backlight turned off\n");
}
-static void southbridge_smi_sleep(void)
+static int power_on_after_fail(void)
{
- u8 reg8;
- u32 reg32;
- u8 slp_typ;
u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
- u16 pmbase = get_pmbase();
/* save and recover RTC port values */
u8 tmp70, tmp72;
@@ -141,6 +137,16 @@ static void southbridge_smi_sleep(void)
outb(tmp70, 0x70);
outb(tmp72, 0x72);
+ /* For "KEEP", switch to "OFF" - KEEP is software emulated. */
+ return (s5pwr == MAINBOARD_POWER_ON);
+}
+
+static void southbridge_smi_sleep(void)
+{
+ u32 reg32;
+ u8 slp_typ;
+ u16 pmbase = get_pmbase();
+
/* First, disable further SMIs */
disable_smi(SLP_SMI_EN);
@@ -190,15 +196,11 @@ static void southbridge_smi_sleep(void)
/* Disable all GPE */
disable_all_gpe();
- /* Always set the flag in case CMOS was changed on runtime. For
- * "KEEP", switch to "OFF" - KEEP is software emulated
- */
- reg8 = pci_read_config8(PCH_DEV_LPC, GEN_PMCON_3);
- if (s5pwr == MAINBOARD_POWER_ON)
- reg8 &= ~1;
+ /* Always set the flag in case CMOS was changed on runtime. */
+ if (power_on_after_fail())
+ pci_and_config8(PCH_DEV_LPC, GEN_PMCON_3, ~1);
else
- reg8 |= 1;
- pci_write_config8(PCH_DEV_LPC, GEN_PMCON_3, reg8);
+ pci_or_config8(PCH_DEV_LPC, GEN_PMCON_3, 1);
/* also iterates over all bridges on bus 0 */
busmaster_disable_on_bus(0);