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| author | Angel Pons <th3fanbus@gmail.com> | 2020-03-21 21:38:16 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-23 09:45:26 +0000 |
| commit | 143309fad45e01c623036c981d568cfb3bd5662f (patch) | |
| tree | 324b256f5d707f6c8d2fc99ccb231db460cdfeb4 /src/soc/intel | |
| parent | 66f569f4aed42cb1995866a887c9eb780fa7f432 (diff) | |
nb/intel/sandybridge: Remove oddball `- 1` in tRFC
Fixes a blunder in commit 50db9c99be7e09aafb7cfd353bd0ac9878b76fca
(nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings).
Tested on Asus P8Z77-V LX2, still boots fine with an i7-2600.
Change-Id: I73436b9f7df9f3a065469fb89bcd0cc6183bb774
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions