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authorJohn Zhao <john.zhao@intel.com>2021-04-21 10:48:20 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-04-23 14:48:04 +0000
commita66b816675fc299e03092ef8d7b2c59f04641fb7 (patch)
tree5f561621e203d0375610c33e1e0f8991877ff808 /src/soc/intel/xeon_sp
parenteb2a784b8b9d51b559246c5f7c65cae7163ddb08 (diff)
soc/intel/jasperlake: Remove TCSS setting from the DMAR table
The Jasperlake does not support TCSS. This change removes the TCSS setting from the DMAR table. BUG=None TEST=Built image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I573e2038fd76ac66af88125117774b40cc80c704 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52575 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp')
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