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authorMarek Maslanka <mmaslanka@google.com>2024-01-17 14:57:36 +0000
committerFelix Held <felix-coreboot@felixheld.de>2024-01-30 13:28:39 +0000
commit06798cd53f832d5551748d892921df3132b8e659 (patch)
tree1ec70bd0fa4b179db036202ab538233f25b157ea /src/soc/intel/xeon_sp
parent33387eb23dc63a7382b1cb0f86c2c4ae510df153 (diff)
soc/intel: Unify the definition of TCO registers
Move the definition of the TCO registers used in most boards to a separate file and use it consistently. Do not unify TCO for older incompatible platforms. BUG=b:314260167 TEST=none Change-Id: Id64a635d106cea879ab08aa7beca101de14b1ee6 Signed-off-by: Marek Maslanka <mmaslanka@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80005 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Jakub Czapiga <czapiga@google.com>
Diffstat (limited to 'src/soc/intel/xeon_sp')
-rw-r--r--src/soc/intel/xeon_sp/include/soc/smbus.h14
1 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/smbus.h b/src/soc/intel/xeon_sp/include/soc/smbus.h
index 7ef9d0b2d1..5d7dbb1fdb 100644
--- a/src/soc/intel/xeon_sp/include/soc/smbus.h
+++ b/src/soc/intel/xeon_sp/include/soc/smbus.h
@@ -3,19 +3,7 @@
#ifndef _SOC_SMBUS_H_
#define _SOC_SMBUS_H_
-/* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
-#define TCO1_STS 0x04
-#define TCO_TIMEOUT (1 << 3)
-#define TCO2_STS 0x06
-#define TCO2_STS_SECOND_TO (1 << 1)
-#define TCO_INTRD_DET (1 << 0)
-#define TCO1_CNT 0x08
-#define TCO_LOCK (1 << 12)
-#define TCO_TMR_HLT (1 << 11)
-#define TCO2_CNT 0x0A
-#define TCO_INTRD_SEL_MASK (3 << 1)
-#define TCO_INTRD_SEL_SMI (1 << 2)
-#define TCO_INTRD_SEL_INT (1 << 1)
+#include <soc/intel/common/tco.h>
/* SMBus I/O bits. */
#define SMBUS_SLAVE_ADDR 0x24