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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-10-23 11:08:41 +0200 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-29 14:41:15 +0000 |
| commit | 9059a8987892503c31f77ac9aba4ca2bacf3e3af (patch) | |
| tree | 683279c09282af709c022a1ca379a958864d80f9 /src/soc/intel/xeon_sp | |
| parent | 41b5b045ddca9286dab6b5345b6adba06514c1f1 (diff) | |
sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable
More recent platforms (Cooperlake) need bigger sizes.
Change-Id: Ia3e81d051a03b54233eef6ccdc4740c1a709be40
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Kconfig | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index 43337b5b67..7b583cd14a 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -104,4 +104,21 @@ config DIMM_SPD_SIZE int default 512 +if INTEL_TXT + +config INTEL_TXT_SINIT_SIZE + hex + default 0x50000 + help + According to document number 572782 this needs to be 256KiB + for the SINIT module and 64KiB for SINIT data. + +config INTEL_TXT_HEAP_SIZE + hex + default 0xf0000 + help + This must be 960KiB according to 572782. + +endif # INTEL_TXT + endif |