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authorArthur Heymans <arthur@aheymans.xyz>2021-02-15 14:16:34 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-17 10:36:27 +0000
commit2cba9e44b622be58caa577049bd544ddf17a26e1 (patch)
tree6b72d2709884d0d0d80b6e54c21a8662de4d85cd /src/soc/intel/xeon_sp
parent1174dad2e26308b5d3d790756ac0cd0649646dfb (diff)
soc/intel/xeon_sp/smmrelocate: Don't run twice on the BSP
This only makes sense if relocation via MSR is possible, to relocate APs in parallel. xeon_sp hardware does not support these MSR. TESTED: ocp/deltalake boots fine. SMM is relocated on CPU 0 just like all other cores. Change-Id: Ic45e6985093b8c9a1cee13c87bc0f09c77aaa0d2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp')
-rw-r--r--src/soc/intel/xeon_sp/cpx/cpu.c2
-rw-r--r--src/soc/intel/xeon_sp/skx/cpu.c2
-rw-r--r--src/soc/intel/xeon_sp/smmrelocate.c15
3 files changed, 2 insertions, 17 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c
index be01fc0b9f..b3ab236faf 100644
--- a/src/soc/intel/xeon_sp/cpx/cpu.c
+++ b/src/soc/intel/xeon_sp/cpx/cpu.c
@@ -183,7 +183,7 @@ static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init,
.get_cpu_count = get_thread_count,
.get_smm_info = get_smm_info,
- .pre_mp_smm_init = smm_initialize,
+ .pre_mp_smm_init = smm_southbridge_clear_state,
.relocation_handler = smm_relocation_handler,
.get_microcode_info = get_microcode_info,
.post_mp_init = post_mp_init,
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index f9cd356efc..848c907e58 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -217,7 +217,7 @@ static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init,
.get_cpu_count = get_platform_thread_count,
.get_smm_info = get_smm_info,
- .pre_mp_smm_init = smm_initialize,
+ .pre_mp_smm_init = smm_southbridge_clear_state,
.relocation_handler = smm_relocation_handler,
.post_mp_init = post_mp_init,
};
diff --git a/src/soc/intel/xeon_sp/smmrelocate.c b/src/soc/intel/xeon_sp/smmrelocate.c
index a71a740955..dc4b511ad2 100644
--- a/src/soc/intel/xeon_sp/smmrelocate.c
+++ b/src/soc/intel/xeon_sp/smmrelocate.c
@@ -127,18 +127,3 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
if (mtrr_cap.lo & SMRR_SUPPORTED)
write_smrr(relo_params);
}
-
-void smm_initialize(void)
-{
- /* Clear the SMM state in the southbridge. */
- smm_southbridge_clear_state();
- /* Run the relocation handler for on the BSP . */
- smm_initiate_relocation();
-}
-
-void smm_relocate(void)
-{
- /* Save states via MSR does not seem to be supported on CPX */
- if (!boot_cpu())
- smm_initiate_relocation();
-}