diff options
| author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-09-28 22:38:31 +0800 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-08 12:09:26 +0000 |
| commit | 7581352759ed3553f42b5356aaaa9759ec1c43b9 (patch) | |
| tree | 97d0128b663efb5130f3b774b0c28ad3be48fd54 /src/soc/intel/xeon_sp/include | |
| parent | b734ae2e8a1b9d7bca23f97b2da08c7817b8972a (diff) | |
soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17
For now only implement for one socket and some of the fields
are hard-coded for DDR4 including memory device type, data width
and ECC support.
Change-Id: I3cb72d18027d972140828970206834ff55b72022
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/romstage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/romstage.h b/src/soc/intel/xeon_sp/include/soc/romstage.h index aa46067bbb..90689afc7f 100644 --- a/src/soc/intel/xeon_sp/include/soc/romstage.h +++ b/src/soc/intel/xeon_sp/include/soc/romstage.h @@ -8,5 +8,5 @@ /* These functions are weak and can be overridden by a mainboard functions. */ void mainboard_memory_init_params(FSPM_UPD * mupd); void mainboard_rtc_failed(void); - +void save_dimm_info(void); #endif /* _SOC_ROMSTAGE_H_ */ |