diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-10 15:55:31 +0100 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-28 13:39:39 +0000 |
| commit | 7a36ca5a3af464bab21e61256e41c4c8eb220f7d (patch) | |
| tree | bdd607596430ffce17d5191690a0e11e98745156 /src/soc/intel/xeon_sp/cpx | |
| parent | 42a6f7e417f64a475f6e2b54ea59ee0a733a9c79 (diff) | |
soc/intel/xeon_sp: Lock down IIO DFX Global registers
This is required for CbNT.
Change-Id: I565a95cd2e76cb1c648884be6d1954288f6e4804
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h index 6ddcce4cfe..95290f2f55 100644 --- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h @@ -127,4 +127,8 @@ #define DMIRCBAR 0x50 #define ERRINJCON 0x1d8 +// IIO DFX Global D7F7 registers +#define IIO_DFX_TSWCTL0 0x30c +#define IIO_DFX_LCK_CTL 0x504 + #endif /* _SOC_PCI_DEVS_H_ */ |