aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/xeon_sp/cpx/chip.c
diff options
context:
space:
mode:
authorJonathan Zhang <jonzhang@fb.com>2020-05-28 17:53:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-14 16:44:58 +0000
commit3172f987fa632189ad3bb44d61614b58be0b142a (patch)
tree93a586c8335b1cbafec9f9e5d823b7325476c8f1 /src/soc/intel/xeon_sp/cpx/chip.c
parent2c4866228e83e3dc4ae547356fe4be4ce4fda77b (diff)
soc/intel/xeon_sp/cpx: add NUMA ACPI tables
Add NUMA ACPI tables: SRAT, SLIT. TESTED=Boot CPX-SP based server, check /sys/firmware/acpi/tables for SRAT/SLIT tables. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com> Change-Id: I3374b802afd2d001e841afd85e7ae07bc27c01ff Reviewed-on: https://review.coreboot.org/c/coreboot/+/41902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/chip.c')
-rw-r--r--src/soc/intel/xeon_sp/cpx/chip.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 19ebe4786d..cded072ccd 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -8,6 +8,7 @@
#include <fsp/api.h>
#include <intelblocks/p2sb.h>
#include <post.h>
+#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/ramstage.h>
#include <soc/pm.h>
@@ -496,6 +497,7 @@ static struct device_operations pci_domain_ops = {
.read_resources = &pci_domain_read_resources,
.set_resources = &xeonsp_cpx_pci_domain_set_resources,
.scan_bus = &xeonsp_cpx_pci_domain_scan_bus,
+ .write_acpi_tables = &northbridge_write_acpi_tables,
};
static struct device_operations cpu_bus_ops = {