diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-06-26 14:42:11 -0700 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-07-04 11:25:50 +0000 |
| commit | 29f61a2110a04b3e21f374d9ad5a853146f74485 (patch) | |
| tree | f0aee8672e1c2e67d9709471ddb49353d2e81567 /src/soc/intel/xeon_sp/cpx/Makefile.inc | |
| parent | 37f38505f279af3cb02b9ec7c70c38c1ae0005c2 (diff) | |
soc/intel/xeon_sp/cpx: update HOB display code
Fix a typo to use CONFIG_DISPLAY_HOBS instead of CONFIG_DISPLAY_HOB.
Build hob display into romstage, in addition to ramstage.
Memory map HOB data is a big structure. Update the soc_display_memmap_hob()
to assist trouble shooting of FSP interface.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Iece745fe21d11b4a470ba8318201bb6e68c5da26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42841
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/Makefile.inc')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Makefile.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index a7ac5d7964..969fe252e5 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -10,9 +10,10 @@ subdirs-y += ../../../../cpu/intel/microcode romstage-y += romstage.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-y += chip.c acpi.c cpu.c soc_util.c -ramstage-$(CONFIG_DISPLAY_HOB) += hob_display.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx |