diff options
author | Marc Jones <marcjones@sysproconsulting.com> | 2020-10-19 21:12:27 -0600 |
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committer | Marc Jones <marc@marcjonesconsulting.com> | 2020-10-30 18:55:42 +0000 |
commit | 444fda45287822920d389809d9dd1f935f22c592 (patch) | |
tree | 509c51f661b80a06f97f57b9fd515cc6dd9be7ad /src/soc/intel/xeon_sp/Makefile.inc | |
parent | d49c8cfbf132aace89db372fad86116cd20a9acd (diff) |
soc/intel/xeon_xp: Combine cpx and skx acpi.c
Prepare for common ACPI. Combine cpx and skx acpi.c into a single
file in xeon_sp. This is almost the last step in using common/block
acpi.
Change-Id: I5f40eb7909bb796907682c548219c7515f2ae4d1
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46600
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/Makefile.inc')
-rw-r--r-- | src/soc/intel/xeon_sp/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/Makefile.inc b/src/soc/intel/xeon_sp/Makefile.inc index f3e6839584..40a1020c5c 100644 --- a/src/soc/intel/xeon_sp/Makefile.inc +++ b/src/soc/intel/xeon_sp/Makefile.inc @@ -9,6 +9,7 @@ bootblock-y += bootblock.c spi.c lpc.c gpio.c pch.c romstage-y += romstage.c reset.c util.c spi.c gpio.c pmutil.c ramstage-y += uncore.c reset.c util.c lpc.c spi.c gpio.c nb_acpi.c ramstage.c chip_common.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c postcar-y += spi.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/include |