diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2020-10-22 14:03:46 +0200 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-11-04 13:43:09 +0000 |
commit | 7f44929ed91d3f3157f2d26673fadb74ae7d8ff4 (patch) | |
tree | 0bb3d094a24e9974c75dc6ef796f4084a6ab85d8 /src/soc/intel/xeon_sp/Makefile.inc | |
parent | 0be783b30e76a9f9aa6bf65eb315a02cb91cbe23 (diff) |
soc/intel/xeon_sp: Add a smm_region function
This reports where TSEG is located and will be used when setting up
SMM.
Change-Id: I9a89cc79b08e2dcf1ffb91aa27d92c387cc93bfd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/Makefile.inc')
-rw-r--r-- | src/soc/intel/xeon_sp/Makefile.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/Makefile.inc b/src/soc/intel/xeon_sp/Makefile.inc index 40a1020c5c..07fe3debb4 100644 --- a/src/soc/intel/xeon_sp/Makefile.inc +++ b/src/soc/intel/xeon_sp/Makefile.inc @@ -6,8 +6,9 @@ subdirs-$(CONFIG_SOC_INTEL_SKYLAKE_SP) += skx subdirs-$(CONFIG_SOC_INTEL_COOPERLAKE_SP) += cpx bootblock-y += bootblock.c spi.c lpc.c gpio.c pch.c -romstage-y += romstage.c reset.c util.c spi.c gpio.c pmutil.c +romstage-y += romstage.c reset.c util.c spi.c gpio.c pmutil.c memmap.c ramstage-y += uncore.c reset.c util.c lpc.c spi.c gpio.c nb_acpi.c ramstage.c chip_common.c +ramstage-y += memmap.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c postcar-y += spi.c |