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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-21 14:08:53 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-05-06 04:12:32 +0000 |
| commit | 87b7ec2ebb94d3c3c14c2fd6ec34ad80af950767 (patch) | |
| tree | 91ad4b5fc1afbc52eaf8e3cc278016451c1ea0ea /src/soc/intel/tigerlake | |
| parent | 8d3cc1bcc23a768af879dee160276eae489c5de8 (diff) | |
soc/intel/common: Add CPU Port ID field to GPIO communities
The CPU can have its own Port IDs when addressing GPIO communities, which
differ from the PCH PCR IDs.
1) Add a field to `struct pad_community` that can hold this value when
known.
2) Add a function to return this value for a given GPIO pad.
Change-Id: I007c01758ae3026fe4dfef07b6a3a269ee3f9e33
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
0 files changed, 0 insertions, 0 deletions