diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-07-13 14:02:42 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-28 16:28:59 +0000 |
| commit | e4eba133cc73761fb7ca4bb5de8b8a01633b2be1 (patch) | |
| tree | 6e738e907414195781d8840f54ca3b81ed9941fe /src/soc/intel/tigerlake | |
| parent | 8f1c70706056723f2be33ef15b1bc06092f1160f (diff) | |
soc/amd/genoa: Deal with memory map for 32M or larger flash
Only the lower half of the flash gets memory mapped below 4G in the
current setup.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Change-Id: Iffe5c17a50f3254411a4847c7e635ce0fd282fde
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76499
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
0 files changed, 0 insertions, 0 deletions