diff options
author | Curtis Chen <curtis.chen@intel.com> | 2021-12-07 18:01:57 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-20 17:49:53 +0000 |
commit | b89c798ddcfe023aa7bc41d433f495f8edb6539e (patch) | |
tree | 08ad3a0df1cf048f59e6fffaa8eb97e305720779 /src/soc/intel/tigerlake | |
parent | b39f2a90667a1ac32155a71c43426f383fbe1305 (diff) |
soc/intel/common: Do not trigger crashlog on all resets by default
Crashlog has error records and PMC reset records two parts. When we
send ipc cmd "PMC_IPC_CMD_ID_CRASHLOG_ON_RESET", PMC reset record is
enabled. At each warm/cold/global reset, crashlog would be triggered.
The cause of this crash would be "TRIGGER_ON_ALL_RESETS", it is used to
catch unknown reset reason. At the same time, we would see [Hardware
Error] in the kernel log.
If we default enable TRIGGER_ON_ALL_RESETS, we would have too many false
alarm. Now we disable PMC reset records part by default. And we could
enable it when we need it for the debug purpose.
The generated bert dump is under /var/spool/crash/, we could check this
path to verify this CONFIG disable/enable status.
BUG=b:202737385
TEST=No new bert dump after a warm reset.
Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Change-Id: I3ec4ff3c8a3799156de030f4556fe6ce61305139
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index a7b3ae447d..cf59b60378 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -284,13 +284,6 @@ config MRC_CHANNEL_WIDTH int default 16 -config SOC_INTEL_CRASHLOG - def_bool n - select SOC_INTEL_COMMON_BLOCK_CRASHLOG - select ACPI_BERT - help - Enables CrashLog. - # Intel recommends reserving the following resources per USB4 root port, # from TGL BIOS Spec (doc #611569) Revision 0.7.6 Section 7.2.5.1.5 # - 42 buses |