diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-10-30 20:43:50 -0700 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-11-02 13:31:33 +0000 |
| commit | 8bde652241ecb8356540b3a418012d3c7e570ac3 (patch) | |
| tree | 4dfd2469fca03e5e9f97f82f766245d4bec33180 /src/soc/intel/tigerlake | |
| parent | eb93808fa53d95900ea42b42f8c943c282d99973 (diff) | |
drivers/intel/gma/opregion: Use CBFS cache to load VBT
Thanks to x86 CBFS cache support, we can leverage cbfs_map() function
to load the VBT binary regardless of if it is compressed or not.
Change-Id: I1e37e718a71bd85b0d7dee1efc4c0391798f16f7
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index c07a0d8365..2d5cf08a48 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -222,10 +222,6 @@ config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL hex default 0x7fff -config VBT_DATA_SIZE_KB - int - default 9 - config VBOOT select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_BOOTBLOCK |