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| author | Ariel Fang <ariel_fang@wistron.corp-partner.google.com> | 2021-12-14 19:29:34 +0800 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-01-05 17:26:39 +0000 |
| commit | 6dfc0aebb3cf4f0149b9c0408911c1bbc4f3a505 (patch) | |
| tree | 131b3aa21c47bd1d3b089937d7d9273958ce44a3 /src/soc/intel/tigerlake | |
| parent | 774ffe3998366bddadc46957b17341ae26f778af (diff) | |
mb/google/brya/var/primus: Fix some GPIO programming
After checking them against schematics, a few unused GPIOs that were inherited
from the baseboard were missed, so this CL programs them as PAD_NC.
GPP_B2 => non-use
GPP_B15 => non-use (for FPR)
GPP_D3 => non-use (Test point)
GPP_E21 => non-use (for LCLW Detect)
BUG=b:211721639
TEST= USE="project_primus" emerge-brya coreboot
Signed-off-by: Ariel Fang <ariel_fang@wistron.corp-partner.google.com>
Change-Id: I4e269bc6fb6eda7b2de57e1a9c900864d3e86e98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/soc/intel/tigerlake')
0 files changed, 0 insertions, 0 deletions