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authorFelix Singer <felixsinger@posteo.net>2023-02-09 01:54:17 +0100
committerFelix Singer <felixsinger@posteo.net>2023-02-09 02:13:19 +0000
commit10d4753f405410e0aaa689320c7f7e2bc57bdce6 (patch)
tree8c78ddaf257ada4c09c58090276952533a5857b2 /src/soc/intel/tigerlake
parent4a7af6e14850497bf8240c0339c0f2d7e30e4663 (diff)
Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT"
This reverts commit d6e04aa00bc5a8912a041a569eb57f6962d1119a. Reason for revert: Breaks master. Change-Id: If7daeaaffe3f9ae9f5e2fbecef5817b9b62827d3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72917 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/Kconfig6
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss.asl4
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss_dma.asl12
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss_pcierp.asl12
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss_xhci.asl8
5 files changed, 24 insertions, 18 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index f59d507f6d..915145085b 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -205,6 +205,12 @@ config SOC_INTEL_I2C_DEV_MAX
int
default 6
+config SOC_INTEL_TIGERLAKE_S3
+ bool
+ default n
+ help
+ Select if using S3 instead of S0ix to disable D3Cold
+
config SOC_INTEL_UART_DEV_MAX
int
default 3
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl
index 98337a3e5e..be9d306f6e 100644
--- a/src/soc/intel/tigerlake/acpi/tcss.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss.asl
@@ -676,7 +676,7 @@ Scope (\_SB.PCI0)
}
}
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
Method (TCON, 0)
{
/* Reset IOM D3 cold bit if it is in D3 cold now. */
@@ -787,7 +787,7 @@ Scope (\_SB.PCI0)
STAT = 0
}
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
/*
* TCSS xHCI device
diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
index bbb0b6a1ad..3c19ef621e 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
@@ -27,11 +27,11 @@ Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */
Method (_S0W, 0x0)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
Return (0x04)
#else
Return (0x03)
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
/*
@@ -40,7 +40,7 @@ Method (_S0W, 0x0)
*/
Method (_PR0)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
If (DUID == 0) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
@@ -52,12 +52,12 @@ Method (_PR0)
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
Method (_PR3)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
If (DUID == 0) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
@@ -69,7 +69,7 @@ Method (_PR3)
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
/*
diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
index 6dbde46f49..fda58e70cf 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
@@ -247,16 +247,16 @@ Method (_PS3, 0, Serialized)
Method (_S0W, 0x0, NotSerialized)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
Return (0x4)
#else
Return (0x3)
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_ALDERLAKE_S3
}
Method (_PR0)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
@@ -268,12 +268,12 @@ Method (_PR0)
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
Method (_PR3)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
If ((TUID == 0) || (TUID == 1)) {
Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
} Else {
@@ -285,7 +285,7 @@ Method (_PR3)
} Else {
Return (Package() { \_SB.PCI0.TBT1 })
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
/*
diff --git a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl
index ddc5a6665d..a3b8c8faf7 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl
@@ -30,11 +30,11 @@ Method (_PS3, 0, Serialized)
Method (_S0W, 0x0, NotSerialized)
{
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
Return (0x4)
#else
Return (0x3)
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
}
/*
@@ -43,7 +43,7 @@ Method (_S0W, 0x0, NotSerialized)
*/
Name (SD3C, 0)
-#if CONFIG(D3COLD_SUPPORT)
+#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
Method (_PR0)
{
Return (Package () { \_SB.PCI0.D3C })
@@ -53,7 +53,7 @@ Method (_PR3)
{
Return (Package () { \_SB.PCI0.D3C })
}
-#endif // D3COLD_SUPPORT
+#endif // SOC_INTEL_TIGERLAKE_S3
/*
* XHCI controller _DSM method