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| author | Yidi Lin <yidi.lin@mediatek.com> | 2020-11-11 10:44:15 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-16 11:04:11 +0000 |
| commit | 7de8df467aca97208f8cd5ff4e520d18f088378e (patch) | |
| tree | 826ea91465f376fca577b8fe250b585400951623 /src/soc/intel/tigerlake/uart.c | |
| parent | 93538c99691b962fc69082b1d26e57911f76dc9c (diff) | |
soc/mediatek/mt8192: Reserve 44K SRAM for MCUPM working buffer
Reduce PRERAM_CBMEM_CONSOLE buffer from 63K to 19K and reserve
0x00115000 ~ 0x0011ffff for MCUPM.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Ic82a194736eecd7bdc8df80b493290090a2ccba5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/uart.c')
0 files changed, 0 insertions, 0 deletions