aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/tigerlake/romstage
diff options
context:
space:
mode:
authorAamir Bohra <aamir.bohra@intel.com>2020-03-23 10:13:10 +0530
committerFurquan Shaikh <furquan@google.com>2020-04-01 19:12:30 +0000
commit555c9b6268febf001e887fbb9e3c3f0901a371ac (patch)
treed3b1968356086c05ac0894115f45b06cb8437e85 /src/soc/intel/tigerlake/romstage
parenta23e0c9d74b7f06738ebf28b068e1bd63f246982 (diff)
soc/intel/tigerlake: Remove Jasper Lake SoC references
This implementation removes all JSL references from the TGL SoC code. Additionally, mainboard code changes are done to support build. BUG=b:150217037 TEST=build tglrvp and volteer Change-Id: I18853aba8b1e6ff7d37c03e8dae2521719c7c727 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/romstage')
-rw-r--r--src/soc/intel/tigerlake/romstage/Makefile.inc3
-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params.c (renamed from src/soc/intel/tigerlake/romstage/fsp_params_tgl.c)0
-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params_jsl.c145
3 files changed, 1 insertions, 147 deletions
diff --git a/src/soc/intel/tigerlake/romstage/Makefile.inc b/src/soc/intel/tigerlake/romstage/Makefile.inc
index 817df541a9..5a8322b055 100644
--- a/src/soc/intel/tigerlake/romstage/Makefile.inc
+++ b/src/soc/intel/tigerlake/romstage/Makefile.inc
@@ -12,8 +12,7 @@
# GNU General Public License for more details.
#
-romstage-$(CONFIG_SOC_INTEL_TIGERLAKE) += fsp_params_tgl.c
-romstage-$(CONFIG_SOC_INTEL_JASPERLAKE) += fsp_params_jsl.c
+romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
romstage-y += pch.c
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index 32f1b031a9..32f1b031a9 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
deleted file mode 100644
index 39fc445b90..0000000000
--- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <assert.h>
-#include <console/console.h>
-#include <fsp/util.h>
-#include <soc/pci_devs.h>
-#include <soc/romstage.h>
-#include <soc/soc_chip.h>
-#include <string.h>
-
-static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
- const struct soc_intel_tigerlake_config *config)
-{
- unsigned int i;
- const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD);
- uint32_t mask = 0;
-
- if (!dev || !dev->enabled) {
- /* Skip IGD initialization in FSP if device is disabled in devicetree.cb */
- m_cfg->InternalGfx = 0;
- m_cfg->IgdDvmt50PreAlloc = 0;
- } else {
- m_cfg->InternalGfx = 1;
- /* Set IGD stolen size to 60MB. */
- m_cfg->IgdDvmt50PreAlloc = 0xFE;
- }
-
- m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
- m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
- m_cfg->SaGv = config->SaGv;
- m_cfg->RMT = config->RMT;
-
- /* PCIe root port configuration */
- for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) {
- if (config->PcieRpEnable[i])
- mask |= (1 << i);
- }
-
- m_cfg->PcieRpEnableMask = mask;
-
- _Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcUsage) >=
- ARRAY_SIZE(config->PcieClkSrcUsage), "copy buffer overflow!");
- memcpy(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage,
- sizeof(config->PcieClkSrcUsage));
-
- _Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcClkReq) >=
- ARRAY_SIZE(config->PcieClkSrcClkReq), "copy buffer overflow!");
- memcpy(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq,
- sizeof(config->PcieClkSrcClkReq));
-
- m_cfg->PrmrrSize = config->PrmrrSize;
- m_cfg->EnableC6Dram = config->enable_c6dram;
-
- /* Disable BIOS Guard */
- m_cfg->BiosGuard = 0;
-
- /* Set CPU Ratio */
- m_cfg->CpuRatio = 0;
-
- /* Set debug interface flags */
- m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
- DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
-
- /* TraceHub configuration */
- dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
- if (dev && dev->enabled && config->TraceHubMode) {
- m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB;
- m_cfg->PchTraceHubMode = config->TraceHubMode;
- m_cfg->CpuTraceHubMode = config->TraceHubMode;
- }
-
- /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */
- m_cfg->VmxEnable = CONFIG(ENABLE_VMX);
-
-
- /* Enable SMBus controller based on config */
- m_cfg->SmbusEnable = config->SmbusEnable;
-
- /* Set debug probe type */
- m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT;
-
- /* VT-d config */
- m_cfg->VtdDisable = 0;
-
- m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
-
- /* Display */
- m_cfg->DdiPortAConfig = config->DdiPortAConfig;
- m_cfg->DdiPortBHpd = config->DdiPortBHpd;
- m_cfg->DdiPortCHpd = config->DdiPortCHpd;
- m_cfg->DdiPortBDdc = config->DdiPortBDdc;
- m_cfg->DdiPortCDdc = config->DdiPortCDdc;
-
- /* Audio */
- dev = pcidev_path_on_root(PCH_DEVFN_HDA);
- if (!dev)
- m_cfg->PchHdaEnable = 0;
- else
- m_cfg->PchHdaEnable = dev->enabled;
-
- m_cfg->PchHdaDspEnable = config->PchHdaDspEnable;
- m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;
-
- _Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkDmicEnable) >=
- ARRAY_SIZE(config->PchHdaAudioLinkDmicEnable), "copy buffer overflow!");
- memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable,
- sizeof(config->PchHdaAudioLinkDmicEnable));
-
- _Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSspEnable) >=
- ARRAY_SIZE(config->PchHdaAudioLinkSspEnable), "copy buffer overflow!");
- memcpy(m_cfg->PchHdaAudioLinkSspEnable, config->PchHdaAudioLinkSspEnable,
- sizeof(config->PchHdaAudioLinkSspEnable));
-
- _Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSndwEnable) >=
- ARRAY_SIZE(config->PchHdaAudioLinkSndwEnable), "copy buffer overflow!");
- memcpy(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable,
- sizeof(config->PchHdaAudioLinkSndwEnable));
-}
-
-void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
-{
- const struct soc_intel_tigerlake_config *config = config_of_soc();
- FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
-
- soc_memory_init_params(m_cfg, config);
-
- mainboard_memory_init_params(mupd);
-}
-
-__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
-{
- printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}