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authorDuncan Laurie <dlaurie@google.com>2020-04-29 12:19:50 -0700
committerDuncan Laurie <dlaurie@chromium.org>2020-05-22 01:47:49 +0000
commit526880754faa1246e97e0bd1d836ecc1738e8c90 (patch)
treeaef1f536413ca77a7caacf781919596f7e04a55b /src/soc/intel/tigerlake/pmc.c
parent47b5a9820f2f95fda349f298054ca40cc2149548 (diff)
soc/intel/tigerlake: Add definition for PMC EPOC
The PMC EPOC register indicates which external crystal oscillator is connected to the PCH. This frequency is important for determining the IP clock of internal PCH devices. Add definitions that allow this register to be read and extract the crystal frequency, and a helper function to extract and return this as the defined enum. BUG=b:146482091 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I959fe507f3dbf93b6176b333a9e725ed09f56328 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40887 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/pmc.c')
-rw-r--r--src/soc/intel/tigerlake/pmc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c
index 2d30424cd0..62e37114f3 100644
--- a/src/soc/intel/tigerlake/pmc.c
+++ b/src/soc/intel/tigerlake/pmc.c
@@ -17,6 +17,13 @@
#include <soc/pm.h>
#include <soc/soc_chip.h>
+enum pch_pmc_xtal pmc_get_xtal_freq(void)
+{
+ uint8_t *const pmcbase = pmc_mmio_regs();
+
+ return PCH_EPOC_XTAL_FREQ(read32(pmcbase + PCH_PMC_EPOC));
+}
+
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;