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authorSubrata Banik <subrata.banik@intel.com>2020-09-28 18:43:47 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-10-03 06:58:07 +0000
commit0359d9dde37b7cce3009cfe630713042601ac5d8 (patch)
treed4d177be70a8db07b58159cbda768d12059f2222 /src/soc/intel/tigerlake/include
parent3e959d8e2a05a50ca16430dcacfd4794db1e49fc (diff)
soc/intel: Make use of PMC low power program from common block
List of changes: 1. Select PMC_LOW_POWER_MODE_PROGRAM from applicable SoC directory 2. Remove redundant PMC programming from SoC and refer to common code block 3. Remove unused 'reg8' and 'reg32' variable as applicable from SoC function. Change-Id: I18894c49cfc6e88675b5fb71bca0412e5639fb4b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45796 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/include')
-rw-r--r--src/soc/intel/tigerlake/include/soc/pmc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h
index b7a97cc824..f926799c75 100644
--- a/src/soc/intel/tigerlake/include/soc/pmc.h
+++ b/src/soc/intel/tigerlake/include/soc/pmc.h
@@ -126,6 +126,7 @@ enum pch_pmc_xtal {
enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
+#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4*(x))