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authorChristian Walter <christian.walter@9elements.com>2020-05-06 09:18:37 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-26 15:01:29 +0000
commite6e9fa6ef90bc62d645da942f3bdc7bdeb1c1930 (patch)
treea490f437351fbd91424ec29224a646780bf5ffbd /src/soc/intel/tigerlake/include
parent9ea70c02cd0e5e28f38136ebbb6dbad72ad177c7 (diff)
soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options
Intel introduced the UPD VrPowerDeliveryDesign with Cannon Lake. The BIOS needs to program VrPowerDeliverDesign configuration per platform according to the platform capabilities to avoid incorrect electrial/power parameters. This is only added for Cannon Lake. Refer to document 599797 for more details. Change-Id: I89b8dceb40fa6a9dc67b218e91bf728ff928b5a0 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41081 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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