diff options
| author | Subrata Banik <subratabanik@google.com> | 2021-12-27 16:31:24 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-01-02 12:29:07 +0000 |
| commit | 346bb0b01063c740a5517717457885308bb5e660 (patch) | |
| tree | f5b1fcae97c39e1a87ffd428d01149350ed836c1 /src/soc/intel/tigerlake/include | |
| parent | e065db0dc229a604263dce1cd009bdb4cac51aef (diff) | |
soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_mode
Since TGL `spi_protection_mode` bit replaces the previous
`manufacturing mode` without changing the offset and purpose
of this bit.
This patch renames to `manufacturing mode` aka `mfg_mode` to
maintain the parity with other PCHs as part of IA-common code.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I6d00f72ce7b3951120778733066c351986ccf343
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60407
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/include')
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/me.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/me.h b/src/soc/intel/tigerlake/include/soc/me.h index 674ac7eb89..ed254444b7 100644 --- a/src/soc/intel/tigerlake/include/soc/me.h +++ b/src/soc/intel/tigerlake/include/soc/me.h @@ -8,7 +8,7 @@ union me_hfsts1 { u32 data; struct { u32 working_state: 4; - u32 spi_protection_mode: 1; + u32 mfg_mode: 1; u32 fpt_bad: 1; u32 operation_state: 3; u32 fw_init_complete: 1; |