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authorJes Klinke <jbk@google.com>2020-08-28 13:44:21 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-09-02 10:37:20 +0000
commit476ca3a0b6b6a9160a4c30576bfcac899d4ceae4 (patch)
treee3f123524f1a00e477a97944df8586bbb0f20271 /src/soc/intel/tigerlake/include
parent2ad859988b5243411393fdf3116eea281b92b1bb (diff)
soc/intel/tigerlake: Add mainboard hook for overriding SoC config
TEST=util/abuild/abuild -t GOOGLE_VOLTEER -c max -x BUG=b:154333137 Change-Id: Iff28e4a29fab5c22c410cdc743d0402134c4ac56 Signed-off-by: jbk@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/44914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/include')
-rw-r--r--src/soc/intel/tigerlake/include/soc/ramstage.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/ramstage.h b/src/soc/intel/tigerlake/include/soc/ramstage.h
index 8188fbdb84..ec64eec46f 100644
--- a/src/soc/intel/tigerlake/include/soc/ramstage.h
+++ b/src/soc/intel/tigerlake/include/soc/ramstage.h
@@ -9,6 +9,7 @@
#include <soc/soc_chip.h>
void mainboard_silicon_init_params(FSP_S_CONFIG *params);
+void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *config);
void soc_init_pre_device(void *chip_info);
#endif