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authorMaximilian Brune <maximilian.brune@9elements.com>2024-07-30 12:46:18 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-09-30 16:22:20 +0000
commit540d605f484913b885af9fd2b3084db685770960 (patch)
treef268409618a8181d48f27debc7e3facf5b5883f1 /src/soc/intel/tigerlake/i2c.c
parentaed7a871b2520eff698dde22ffdae37f971bd92c (diff)
soc/amd/glinda: Update pci int defs
Update IRQs according to datasheet/PPR. source: PPR #57254 Rev 1.59 Table 137 Change-Id: I843e5e2b01301eb02cb5be347e122cffbe76d80d Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84375 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/i2c.c')
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