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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-07 14:56:10 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-11 08:42:29 +0000 |
| commit | a1636d737ca684d11161c2f80b0971f2ddc96b41 (patch) | |
| tree | b6e030873049768f40f9a0f4c704fa2dd5e47d8a /src/soc/intel/tigerlake/gspi.c | |
| parent | 88381c94801ed5326cc1c840968b359b57ff2ef2 (diff) | |
soc/intel/alderlake: Introduce PCH-S symbol
Introduce SOC_INTEL_ALDERLAKE_PCH_S symbol to differentiate from the
low power chipsets.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I47676723747458b8b7fe726e900843c198901bda
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/tigerlake/gspi.c')
0 files changed, 0 insertions, 0 deletions