diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-07-26 09:22:42 +0200 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-07-28 08:36:59 +0000 |
| commit | 5c10704f58982d62a1326e5d6ff9956e0eaf6e16 (patch) | |
| tree | 0ec8560aba88de53168b21a71c4b74c9b314216c /src/soc/intel/tigerlake/fsp_params.c | |
| parent | 0f823095620e9b6434e9c731468526654a7725ae (diff) | |
soc/intel/tigerlake: Simplify is-device-enabled checks
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43897
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/fsp_params.c')
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 36 |
1 files changed, 8 insertions, 28 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 885a6f9df3..79ce04b5a7 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -99,10 +99,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Check if IGD is present and fill Graphics init param accordingly */ dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) - params->PeiGraphicsPeimInit = 1; - else - params->PeiGraphicsPeimInit = 0; + params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev); /* Use coreboot MP PPI services if Kconfig is enabled */ if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { @@ -195,10 +192,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* SATA */ dev = pcidev_path_on_root(PCH_DEVFN_SATA); - if (!dev) - params->SataEnable = 0; - else { - params->SataEnable = dev->enabled; + params->SataEnable = is_dev_enabled(dev); + if (params->SataEnable) { params->SataMode = config->SataMode; params->SataSalpSupport = config->SataSalpSupport; memcpy(params->SataPortsEnable, config->SataPortsEnable, @@ -244,37 +239,22 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* LAN */ dev = pcidev_path_on_root(PCH_DEVFN_GBE); - if (!dev) - params->PchLanEnable = 0; - else - params->PchLanEnable = dev->enabled; + params->PchLanEnable = is_dev_enabled(dev); /* CNVi */ dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); - if (dev) - params->CnviMode = dev->enabled; - else - params->CnviMode = 0; + params->CnviMode = is_dev_enabled(dev); /* VMD */ dev = pcidev_path_on_root(SA_DEVFN_VMD); - if (dev) - params->VmdEnable = dev->enabled; - else - params->VmdEnable = 0; + params->VmdEnable = is_dev_enabled(dev); /* THC */ dev = pcidev_path_on_root(PCH_DEVFN_THC0); - if (!dev) - params->ThcPort0Assignment = 0; - else - params->ThcPort0Assignment = dev->enabled ? THC_0 : THC_NONE; + params->ThcPort0Assignment = is_dev_enabled(dev) ? THC_0 : THC_NONE; dev = pcidev_path_on_root(PCH_DEVFN_THC1); - if (!dev) - params->ThcPort1Assignment = 0; - else - params->ThcPort1Assignment = dev->enabled ? THC_1 : THC_NONE; + params->ThcPort1Assignment = is_dev_enabled(dev) ? THC_1 : THC_NONE; /* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG(USE_LEGACY_8254_TIMER); |