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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-04 14:45:13 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-29 09:38:22 +0000 |
| commit | 56d913eedb2f4f0df0b2210f139d857a829bdf96 (patch) | |
| tree | e65099a8e855295bda9765823320dc4ec9562ee8 /src/soc/intel/tigerlake/elog.c | |
| parent | 2d33c3e6c3ab2427377b9b532b6590aa87340c4e (diff) | |
soc/intel/braswell: Use sb/intel/common/spi.c
This common implementation is compatible.
Change-Id: I540f73514f17d3b135c3222facfe23170d2bb0c8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/elog.c')
0 files changed, 0 insertions, 0 deletions