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authorKangheui Won <khwon@chromium.org>2021-06-11 14:55:44 +1000
committerMartin Roth <martinroth@google.com>2021-06-24 04:16:47 +0000
commita8b419b37bd272c2a39babd6750311cb0f3640d7 (patch)
treedbf8649e9b89f16286abac58d6dd30d2108c6ad0 /src/soc/intel/tigerlake/cpu.c
parent2ecb0ed266fc548324b6ab931b53b4271da8c50b (diff)
mb/google/guybrush: configure eSPI mux on psp_verstage
Temporarily set eSPI mux in verstage_mainboard_early_init. Ideally cezanne code should have common function to do this and mb-specific code would just call it, but for now PCI access doesn't work in the PSP so we can't do it. AMD team confirmed that the current PSP doesn't configure LPC so we don't have to disable LPC when configuring eSPI mux so we can temporarliy skip the LPC part here. BUG=b:183149183 TEST=boot guybrush with psp_verstage Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I8317409fa5efd1adffc184d75affbb4d305183f2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55406 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/cpu.c')
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