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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-05-20 11:55:36 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-05-26 15:11:03 +0000
commitb30fe36734df3c48ec35438052ee8b28bf7a6a44 (patch)
tree3292f94f475a09678df0fc56f5450e6388c1fa2c /src/soc/intel/tigerlake/chip.h
parentb4d7116a740b2847ef112cc1954462dac0b4cf85 (diff)
soc/intel/tigerlake: Remove MIPI clock setting from devicetree
In Tiger Lake we have support for enabling MIPI clocks at runtime in ACPI. Hence remove setting pch_islclk from devcietree and chip.h. Also update functions which reference pch_isclk. BUG=b:148884060 Branch=None Test=build and boot volteer and verify camera functionality Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I6b3399172c43b4afa4267873ddd8ccf8d417ca16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41570 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/chip.h')
-rw-r--r--src/soc/intel/tigerlake/chip.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 86e703b055..5892829ef4 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -206,9 +206,6 @@ struct soc_intel_tigerlake_config {
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
- /* Enable Pch iSCLK */
- uint8_t pch_isclk;
-
/* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */
enum {
FORCE_DISABLE,