diff options
| author | Wonkyu Kim <wonkyu.kim@intel.com> | 2020-01-23 00:06:07 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-28 18:36:52 +0000 |
| commit | 9f2e3ad6280000b818c71ebd250430509a819553 (patch) | |
| tree | 544a91b954b537f298eb0ebd0cb0cea4d86aef9c /src/soc/intel/tigerlake/chip.h | |
| parent | 61657c2fae46e1ed8e2a4ddd42a2aa3caa8accfa (diff) | |
soc/intel/tigerlake: Enable DP ports according to board design
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board and check FSP log or DP port pin mux
from pinctl driver.
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ia6e9271a11a1f9e6f98923772219ccc1e7daecda
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38528
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/chip.h')
| -rw-r--r-- | src/soc/intel/tigerlake/chip.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 4907f4921d..3f980d1552 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -236,6 +236,32 @@ struct soc_intel_tigerlake_config { * Bit 0: MISCCFG_GPDLCGEN */ uint8_t gpio_pm[TOTAL_GPIO_COMM]; + + /* DP config */ + /* + * Port config + * 0:Disabled, 1:eDP, 2:MIPI DSI + */ + uint8_t DdiPortAConfig; + uint8_t DdiPortBConfig; + + /* Enable(1)/Disable(0) HPD */ + uint8_t DdiPortAHpd; + uint8_t DdiPortBHpd; + uint8_t DdiPortCHpd; + uint8_t DdiPort1Hpd; + uint8_t DdiPort2Hpd; + uint8_t DdiPort3Hpd; + uint8_t DdiPort4Hpd; + + /* Enable(1)/Disable(0) DDC */ + uint8_t DdiPortADdc; + uint8_t DdiPortBDdc; + uint8_t DdiPortCDdc; + uint8_t DdiPort1Ddc; + uint8_t DdiPort2Ddc; + uint8_t DdiPort3Ddc; + uint8_t DdiPort4Ddc; }; typedef struct soc_intel_tigerlake_config config_t; |