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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-09-10 15:10:22 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-17 16:02:27 +0000 |
| commit | 6ca5b475bf286ee8827edee64df5d14b09d936cd (patch) | |
| tree | 83eedb94a05c9e018e4fd8bcb8a8f582ed7afe3d /src/soc/intel/tigerlake/chip.h | |
| parent | 984d0c6afe09360ca4894c12204d21e77a564ef6 (diff) | |
nb/amd/pi/00730F01: enable ACS and AER for PCIe ports
Enable Access Control Services and Advanced Error Reporting for PCI Express
bridges in order to have PCIe devices in separate IOMMU groups for correct
passthrough.
TEST=run dmesg on Debian Buster on PC Engines apu2 and check whether PCIe
devices have separate groups
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I10a8eff0ba37196692f9db6519e498fe535ecd15
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/tigerlake/chip.h')
0 files changed, 0 insertions, 0 deletions