diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-09-22 16:45:46 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-28 09:37:01 +0000 |
| commit | 7614099b8e5d042cd88bc29ba6f6376c9e81d0ae (patch) | |
| tree | 2391a3635006ffabd4253956917cacfdf7f3a0a6 /src/soc/intel/tigerlake/chip.c | |
| parent | 58a706af96f1285ec2501dc6da2776645b88e082 (diff) | |
vc/intel/fsp/fsp2_0/CPX-SP: upgrade to ww38 FSP release
Intel CPX-SP FSP ww38 release made some changes to FSP-M header
file. Those changes do not need corresponding soc code change.
TESTED=built image with ww38 FSP RELEASE binary, booted DeltaLake
DVT to target OS.
Change-Id: I320c4a674f9f4d37c30ce6df510f18ad1ae057eb
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/tigerlake/chip.c')
0 files changed, 0 insertions, 0 deletions