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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-07 02:35:01 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-12 19:32:15 +0000 |
| commit | 2e1f7644295c8947f147f7cbbb1de6fbe83f94ae (patch) | |
| tree | be093424e6810b21d297badf29529e91c8f02d09 /src/soc/intel/tigerlake/bootblock | |
| parent | db5557972ab4e050cd1d85712f512ebbafbfcb68 (diff) | |
sb/intel/common/acpi/irqlinks.asl: Add missing IRQs
IRQ 10 and IRQ 11 are valid for all southbridges using this code, as per
their respective datasheets. So, add them for the sake of completeness.
Change-Id: Ib4504861ed316a95b9735e0ed79f108f18071b3b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43158
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/bootblock')
0 files changed, 0 insertions, 0 deletions