soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock

Clone entirely from Icelake

List of changes on top off initial icelake clone
1. Replace "Icelake" with "Tigerlake"
2. Replace "icl" with "tgl"
3. Replace "icp" with "tgp"
4. Rename structure based on Icelake with Tigerlake
5. Add CPU/PCH/SA EDS document number and chapter number
6. Add required headers into include/soc/ from ICL directory

Tiger Lake specific changes will follow in subsequent patches.
1. Add Tigerlake specific device IDs (CPU/PCH/SA)

Change-Id: Id7a05f4b183028550d805f02a8078ab69862a62e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>

1 files changed, 44 insertions, 0 deletions

diff --git a/src/soc/intel/tigerlake/bootblock/bootblock.c b/src/soc/intel/tigerlake/bootblock/bootblock.c
new file mode 100644
index 0000000000..f6fe4c4dbd
--- /dev/null
+++ b/src/soc/intel/tigerlake/bootblock/bootblock.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <intelblocks/gspi.h>
+#include <intelblocks/systemagent.h>
+#include <intelblocks/uart.h>
+#include <soc/bootblock.h>
+#include <soc/iomap.h>
+#include <soc/pch.h>
+
+asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
+{
+	/* Call lib/bootblock.c main */
+	bootblock_main_with_basetime(base_timestamp);
+}
+
+void bootblock_soc_early_init(void)
+{
+	bootblock_systemagent_early_init();
+	bootblock_pch_early_init();
+	bootblock_cpu_init();
+	pch_early_iorange_init();
+	if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
+		uart_bootblock_init();
+}
+
+void bootblock_soc_init(void)
+{
+	report_platform_info();
+	pch_early_init();
+}