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authorSubrata Banik <subrata.banik@intel.com>2020-09-25 23:32:21 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-27 03:01:04 +0000
commit1bfb74c14c91de5b745c8b8d6f0aabf8fb9ed008 (patch)
tree94372bdd534501054cdad02aded6f98e4fa8d49e /src/soc/intel/tigerlake/acpi
parentbe58923fed229e995b3807b5a6b6a0c19229ff54 (diff)
soc/intel/{jsl,tgl}: Fix GRXS function to get GPIO number proper
This patch ensures that GRXS perform PAD_CFG0_RX_STATE mask first and then right shift PAD_CFG0_RX_STATE_BIT to get correct GPIO number. Change-Id: I96611936f70f79e9dc5ee9414ec68cef00d0d13a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45738 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi')
-rw-r--r--src/soc/intel/tigerlake/acpi/gpio_op.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/acpi/gpio_op.asl b/src/soc/intel/tigerlake/acpi/gpio_op.asl
index 9b9dc4477c..ff12da4c10 100644
--- a/src/soc/intel/tigerlake/acpi/gpio_op.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio_op.asl
@@ -11,7 +11,7 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
- Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
+ Local0 = (PAD_CFG0_RX_STATE & VAL0) >> PAD_CFG0_RX_STATE_BIT
Return (Local0)
}