aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/tigerlake/acpi/gpio.asl
diff options
context:
space:
mode:
authorRonak Kanabar <ronak.kanabar@intel.com>2019-12-16 18:43:52 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-03-03 10:09:26 +0000
commit1c2313d339ba5da92d092451ec2a253acaa2563c (patch)
treec36da0a89d8260facbd20c1fb30504abca6660ed /src/soc/intel/tigerlake/acpi/gpio.asl
parentc052ba0ac11914b8b1bf4dc190a1f6b8d9b6ace1 (diff)
soc/intel/tigerlake: Add Jasper lake GPIO support
Add gpio definition for Jasper Lake gpio controller. Also created a separate file for JSL and TGL gpio keeping common asl file. gpio_soc_defs.h must pass correct information/macro values to asl file for code to work. GPIO controller includes 4 gpio community and 10 groups. Patch adds definition for all gpio within community and groups Updated IRQ mapping for all gpios TEST=Check if jslrvp and tglrvp code is compiling Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Signed-off-by: Usha P <usha.p@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi/gpio.asl')
-rw-r--r--src/soc/intel/tigerlake/acpi/gpio.asl95
1 files changed, 19 insertions, 76 deletions
diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl
index f6cccfb801..0378b52be3 100644
--- a/src/soc/intel/tigerlake/acpi/gpio.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
+ * Copyright 2020 The coreboot project Authors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -15,10 +15,12 @@
#include <soc/gpio_defs.h>
#include <soc/irq.h>
#include <soc/pcr_ids.h>
+#include <intelblocks/gpio.h>
+#include "gpio_op.asl"
Device (GCM0)
{
- Name (_HID, "INT34C5")
+ Name (_HID, CROS_GPIO_NAME)
Name (_UID, 0)
Name (_DDN, "GPIO Controller Community 0")
@@ -42,7 +44,7 @@ Device (GCM0)
Device (GCM1)
{
- Name (_HID, "INT34C5")
+ Name (_HID, CROS_GPIO_NAME)
Name (_UID, 1)
Name (_DDN, "GPIO Controller Community 1")
@@ -66,7 +68,7 @@ Device (GCM1)
Device (GCM4)
{
- Name (_HID, "INT34C5")
+ Name (_HID, CROS_GPIO_NAME)
Name (_UID, 4)
Name (_DDN, "GPIO Controller Community 4")
@@ -90,7 +92,7 @@ Device (GCM4)
Device (GCM5)
{
- Name (_HID, "INT34C5")
+ Name (_HID, CROS_GPIO_NAME)
Name (_UID, 5)
Name (_DDN, "GPIO Controller Community 5")
@@ -119,95 +121,36 @@ Device (GCM5)
Method (GADD, 1, NotSerialized)
{
/* GPIO Community 0 */
- If (Arg0 >= GPP_B0 && Arg0 <= GPP_A24)
+ If (Arg0 >= GPIO_COM0_START && Arg0 <= GPIO_COM0_END)
{
Local0 = PID_GPIOCOM0
- Local1 = Arg0 - GPP_B0
+ Local1 = Arg0 - GPIO_COM0_START
}
/* GPIO Community 1 */
- If (Arg0 >= GPP_S0 && Arg0 <= vI2S2_RXD)
+ If (Arg0 >= GPIO_COM1_START && Arg0 <= GPIO_COM1_END)
{
Local0 = PID_GPIOCOM1
- Local1 = Arg0 - GPP_S0
+ Local1 = Arg0 - GPIO_COM1_START
}
/* GPIO Community 2 */
- If (Arg0 >= GPD0 && Arg0 <= GPD_DRAM_RESETB)
+ If (Arg0 >= GPIO_COM2_START && Arg0 <= GPIO_COM2_END)
{
Local0 = PID_GPIOCOM2
- Local1 = Arg0 - GPD0
+ Local1 = Arg0 - GPIO_COM2_START
}
/* GPIO Community 4 */
- If (Arg0 >= GPP_C0 && Arg0 <= GPP_DBG_PMODE)
+ If (Arg0 >= GPIO_COM4_START && Arg0 <= GPIO_COM4_END)
{
Local0 = PID_GPIOCOM4
- Local1 = Arg0 - GPP_C0
+ Local1 = Arg0 - GPIO_COM4_START
}
- /* GPIO Community 5 */
- If (Arg0 >= GPP_R0 && Arg0 <= GPP_CLK_LOOPBK)
+ /* GPIO Community 05*/
+ If (Arg0 >= GPIO_COM5_START && Arg0 <= GPIO_COM5_END)
{
Local0 = PID_GPIOCOM5
- Local1 = Arg0 - GPP_R0
+ Local1 = Arg0 - GPIO_COM5_START
}
+
Local2 = PCRB(Local0) + PAD_CFG_BASE + (Local1 * 16)
Return (Local2)
}
-
-/*
- * Get GPIO Value
- * Arg0 - GPIO Number
- */
-Method (GRXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- Local0 = GPIORXSTATE_MASK & (VAL0 >> GPIORXSTATE_SHIFT)
-
- Return (Local0)
-}
-
-/*
- * Get GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (GTXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- Local0 = GPIOTXSTATE_MASK & VAL0
-
- Return (Local0)
-}
-
-/*
- * Set GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (STXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- VAL0 |= GPIOTXSTATE_MASK
-}
-
-/*
- * Clear GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (CTXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- VAL0 &= ~GPIOTXSTATE_MASK
-}