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authorLean Sheng Tan <lean.sheng.tan@intel.com>2021-06-16 01:32:22 -0700
committerWerner Zeh <werner.zeh@siemens.com>2021-06-30 07:34:44 +0000
commit508dc163f183f99f4683365ef3a6443658979846 (patch)
tree6dfa0d6bebb5ca26d96a9af547db8d9a5243b68f /src/soc/intel/tigerlake/Kconfig
parentf1ade489c85c95c572ef907bdb3b7f4835c1a9c7 (diff)
soc/intel/common: Move PMC EPOC related code to Intel common code
Move PMC EPOC related code to intel/common/block because it is generic for most Intel platforms and ADL, TGL & EHL use it. Add a kconfig 'PMC_EPOC' to guard this common EPOC code. The PMC EPOC register indicates which external crystal oscillator is connected to the PCH. This frequency is important for determining the IP clock of internal PCH devices. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: Ib5fd3c4a648964678ee40ed0f60ca10fe7953f56 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/Kconfig')
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 26da244203..7bc2ba2b0c 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -40,6 +40,7 @@ config CPU_SPECIFIC_OPTIONS
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
+ select PMC_EPOC
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK