diff options
author | Yuchi Chen <yuchi.chen@intel.com> | 2024-09-27 18:10:41 +0800 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-27 09:31:52 +0000 |
commit | 78fa36d0508fb94634f9c17a28186caab4c3f3f3 (patch) | |
tree | d7719ca4587cf3605f9a63053dac5fc3c9a9a5cd /src/soc/intel/snowridge/sata.c | |
parent | d2deb14fb00f71fca4897e44b4d61d8027d2bdf3 (diff) |
soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
This change adds support for Intel Atom Processors P5300, P5700
product families (known as Snow Ridge NS and Snow Ridge NX).
Change-Id: I32ad836dfaaff0d1816eac41e5a7d19ece11080f
Signed-off-by: Yuchi Chen <yuchi.chen@intel.com>
Tested-by: Vasiliy Khoruzhick <vasilykh@arista.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc/intel/snowridge/sata.c')
-rw-r--r-- | src/soc/intel/snowridge/sata.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/src/soc/intel/snowridge/sata.c b/src/soc/intel/snowridge/sata.c new file mode 100644 index 0000000000..bdd881d996 --- /dev/null +++ b/src/soc/intel/snowridge/sata.c @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/device.h> +#include <device/mmio.h> +#include <device/pci.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <soc/sata.h> + +static void sata_init(struct device *dev) +{ + uint32_t reg32, abar; + + printk(BIOS_DEBUG, "Set SATA controller in AHCI mode.\n"); + + uint16_t reg16 = pci_read_config16(dev, SATA_MAP); + reg16 &= ~(3 << 6); + reg16 |= SATA_MAP_AHCI; + pci_write_config16(dev, SATA_MAP, reg16); + + /* Initialize AHCI memory-mapped space */ + abar = pci_read_config32(dev, SATA_ABAR); + + /* Enable AHCI Mode */ + reg32 = read32p(abar + SATA_GHC); + reg32 |= SATA_GHC_AE; + write32p(abar + SATA_GHC, reg32); +} + +static struct device_operations snr_sata_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = sata_init, + .final = pci_dev_request_bus_master, + .ops_pci = &pci_dev_ops_pci, +}; + +static const unsigned short snr_sata_ids[] = { + PCI_DID_INTEL_SNR_SATA0, + PCI_DID_INTEL_SNR_SATA2, + 0, +}; + +static const struct pci_driver snr_sata_driver __pci_driver = { + .ops = &snr_sata_ops, + .vendor = PCI_VID_INTEL, + .devices = snr_sata_ids, +}; |