diff options
| author | Archana Patni <archana.patni@intel.com> | 2015-07-28 18:43:13 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-29 07:14:37 +0000 |
| commit | d2d4b5a4abf5e69db3dfa84cf38d16e1f0af4747 (patch) | |
| tree | 325b0962b7f4771de9639c9284f122290aebeac5 /src/soc/intel/skylake | |
| parent | c07cdfee080240abd80deb36e2666f0f1afe5dfa (diff) | |
intel/skylake: Clean up Serial IO DMA channels
This patch removes FixedDMA channels carryover code from BDW
as in SKL Integrated DMA is present for each serial io controller.
BRANCH=None
BUG=BUG=chrome-os-partner:40383
TEST=Build and Boot kunimitsu. Tested IDMA on UART.
Change-Id: I66c869d310febcda430809d194b53a903a21fd99
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 833a1980329fb03cf487482e9276c076ede0a0fa
Original-Change-Id: If6ce19cd8d60c727c8f2ffcd9bb232521df63f08
Original-Signed-off-by: Archana Patni <archana.patni@intel.com>
Original-Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/293060
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11415
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/acpi/serialio.asl | 64 |
1 files changed, 3 insertions, 61 deletions
diff --git a/src/soc/intel/skylake/acpi/serialio.asl b/src/soc/intel/skylake/acpi/serialio.asl index 62b83e014b..c6f5446a97 100644 --- a/src/soc/intel/skylake/acpi/serialio.asl +++ b/src/soc/intel/skylake/acpi/serialio.asl @@ -99,12 +99,6 @@ Device (I2C0) { LPSS_I2C0_IRQ } }) - /* DMA channels are only used if Serial IO DMA controller is enabled */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x18, 4, Width32Bit, DMA1) // Tx - FixedDMA (0x19, 5, Width32Bit, DMA2) // Rx - }) Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ @@ -116,6 +110,7 @@ Device (I2C0) } Return (RBUF) } + Method (_STA, 0, NotSerialized) { If (LEqual (\S0EN, 0)) { @@ -155,14 +150,6 @@ Device (I2C1) { LPSS_I2C1_IRQ } }) - /* DMA channels are only used if - * Serial IO DMA controller is enabled - */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) // Tx - FixedDMA (0x1B, 7, Width32Bit, DMA2) // Rx - }) Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ @@ -174,6 +161,7 @@ Device (I2C1) } Return (RBUF) } + Method (_STA, 0, NotSerialized) { If (LEqual (\S1EN, 0)) { @@ -212,15 +200,6 @@ Device (I2C2) { LPSS_I2C2_IRQ } }) - /* DMA channels are only used if - * Serial IO DMA controller is enabled - */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) - FixedDMA (0x1B, 7, Width32Bit, DMA2) - }) - Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ @@ -231,7 +210,6 @@ Device (I2C2) Store (SIO_BAR_LEN, B0LN) } - /* Check if Serial IO DMA Controller is enabled */ Return (RBUF) } @@ -272,15 +250,6 @@ Device (I2C3) { LPSS_I2C3_IRQ } }) - /* DMA channels are only used if - * Serial IO DMA controller is enabled - */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) - FixedDMA (0x1B, 7, Width32Bit, DMA2) - }) - Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ @@ -291,7 +260,6 @@ Device (I2C3) Store (SIO_BAR_LEN, B0LN) } - /* Check if Serial IO DMA Controller is enabled */ Return (RBUF) } @@ -333,15 +301,6 @@ Device (I2C4) { LPSS_I2C4_IRQ } }) - /* DMA channels are only used if - * Serial IO DMA controller is enabled - */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) - FixedDMA (0x1B, 7, Width32Bit, DMA2) - }) - Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS*/ @@ -352,9 +311,9 @@ Device (I2C4) Store (SIO_BAR_LEN, B0LN) } - /* Check if Serial IO DMA Controller is enabled */ Return (RBUF) } + Method (_STA, 0, NotSerialized) { If (LEqual (\S4EN, 0)) { @@ -392,15 +351,6 @@ Device (I2C5) { LPSS_I2C5_IRQ } }) - /* DMA channels are only used if - * Serial IO DMA controller is enabled - */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) - FixedDMA (0x1B, 7, Width32Bit, DMA2) - }) - Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ @@ -409,8 +359,6 @@ Device (I2C5) Store (0xFE02A000, B0AD) Store (SIO_BAR_LEN, B0LN) - - /* Check if Serial IO DMA Controller is enabled */ Return (RBUF) } @@ -496,12 +444,6 @@ Device (SPI1) { LPSS_SPI1_IRQ } }) - /* DMA channels are only used if Serial IO DMA controller is enabled */ - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x10, 0, Width32Bit, DMA1) /* Tx */ - FixedDMA (0x11, 1, Width32Bit, DMA2) /* Rx */ - }) Method (_CRS, 0, NotSerialized) { /* Update BAR0 address and length if set in NVS */ |