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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-05-01 21:17:20 -0600
committerMartin Roth <martinroth@google.com>2019-05-08 13:49:29 +0000
commitb435d4405dacdc218777aaba349151ae28997741 (patch)
tree157ac0af9da3f57e88b6dcc5d131bd6dc209fe5b /src/soc/intel/skylake
parent753c225c2c22df0260a97d3eabaaf15aeb0c4bd6 (diff)
soc/amd/stoneyridge: Add aoac_ read/write functions
Add 8-bit functions to access the AOAC registers and use them in southbridge.c. At this time, there is no reason to pursue WORD or DWORD access and it's not known if those transaction sizes are supported. Change-Id: I3a8f493625f941fb855c0b8a0eff511a9a5ddfe8 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
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