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| author | Angel Pons <th3fanbus@gmail.com> | 2020-03-21 22:21:25 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-23 09:43:21 +0000 |
| commit | 66671ded2fd28a20d547d6b1410fa1e6c0f308cb (patch) | |
| tree | 9bea5fcf58ecd9da607e9441f886f0df6a54e53e /src/soc/intel/skylake | |
| parent | c91b93f22a1e43d066d201e1daeed2ee6067092a (diff) | |
mb/gigabyte/ga-h61ma-d3v: Correct PCIe port setup
Coalescing is not needed, as all PCIe ports are used.
Change-Id: Icf31f6672e0a54d119a6537da1b52c42f9cee823
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39740
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions