diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-11 14:44:29 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-12 22:13:39 +0000 |
| commit | c4e652ff572d7eea3bbbae21825d0085e294cb98 (patch) | |
| tree | 7a9a5ad7d0374742bb7ac091dc4f2814795e47ad /src/soc/intel/skylake | |
| parent | bbd5ee4187dd5b85a8ccf6de28b24a70c0343174 (diff) | |
soc/intel/common: Clean up PMC library GPE handling API
1. Update gpe handling function names to explicitly mention if they
are operating on:
a. STD GPE events
b. GPIO GPE events
c. Both
2. Update comment block in pmclib.h to use generic names for STD and
GPIO GPE registers instead of using any one platform specific names.
BUG=b:67712608
Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21968
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/smi.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/smihandler.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 9dd22e9c7c..4cb4a20cca 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -107,7 +107,7 @@ const char *const *soc_tco_sts_array(size_t *tco_arr) * GPE0 */ -const char *const *soc_gpe_sts_array(size_t *gpe_arr) +const char *const *soc_std_gpe_sts_array(size_t *gpe_arr) { static const char *const gpe_sts_bits[] = { [1] = "HOTPLUG", @@ -208,7 +208,7 @@ uintptr_t soc_read_pmc_base(void) return (uintptr_t) (pmc_mmio_regs()); } -void soc_get_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) +void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) { DEVTREE_CONST struct soc_intel_skylake_config *config; diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c index 23b8ce8e0c..f11a9d8c26 100644 --- a/src/soc/intel/skylake/smi.c +++ b/src/soc/intel/skylake/smi.c @@ -49,7 +49,7 @@ void southbridge_smm_clear_state(void) pmc_clear_smi_status(); pmc_clear_pm1_status(); pmc_clear_tco_status(); - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void southbridge_smm_enable_smi(void) @@ -57,7 +57,7 @@ void southbridge_smm_enable_smi(void) printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ pmc_enable_pm1(GBL_EN); - pmc_disable_gpe(PME_B0_EN); + pmc_disable_std_gpe(PME_B0_EN); /* * Enable SMI generation: diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c index dc4237ab6f..daf8e0eaf5 100644 --- a/src/soc/intel/skylake/smihandler.c +++ b/src/soc/intel/skylake/smihandler.c @@ -153,7 +153,7 @@ static void southbridge_smi_sleep(void) elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ); /* Clear pending GPE events */ - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); /* Next, do the deed. */ switch (slp_typ) { @@ -360,7 +360,7 @@ static void southbridge_smi_pm1(void) static void southbridge_smi_gpe0(void) { - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void __attribute__((weak)) |