diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:42:14 +0200 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:15:25 +0000 |
commit | 2854f40668f37c09c5afa5e7ac670adfaacb44b4 (patch) | |
tree | 2c518c284f486a4c68b2babe10d55779c61cc7d5 /src/soc/intel/skylake | |
parent | ee65079c9657f8e1f8ac1ea3d562b531368eecb7 (diff) |
src/soc/intel: Drop unneeded empty lines
Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r-- | src/soc/intel/skylake/chip.c | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/cpu.c | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/gpio.c | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/gpio_soc_defs.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/usb.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/vr_config.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/me.c | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/smmrelocate.c | 1 |
9 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index a0bcac7bad..981369a5d1 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -295,7 +295,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Device4Enable = dev && dev->enabled; params->EnableTcoTimer = !config->PmTimerDisabled; - tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi; tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock; tconfig->PowerLimit4 = config->PowerLimit4; diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index b1cf4dcb9b..a623292446 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _SOC_CHIP_H_ #define _SOC_CHIP_H_ diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index d941df70b2..79fcda1fa5 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -32,7 +32,6 @@ static void configure_isst(void) config_t *conf = config_of_soc(); msr_t msr; - if (conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP @@ -58,7 +57,6 @@ static void configure_misc(void) config_t *conf = config_of_soc(); msr_t msr; - msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ diff --git a/src/soc/intel/skylake/gpio.c b/src/soc/intel/skylake/gpio.c index f106895296..5519762e34 100644 --- a/src/soc/intel/skylake/gpio.c +++ b/src/soc/intel/skylake/gpio.c @@ -5,7 +5,6 @@ #include <soc/pcr_ids.h> #include <soc/pm.h> - static const struct reset_mapping rst_map[] = { { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30}, { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30}, diff --git a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h index 9e49b8215a..af092050b0 100644 --- a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h @@ -209,5 +209,4 @@ #define NUM_GPIO_COM2_PADS (GPD11 - GPD0 + 1) - #endif /* _SOC_GPIO_SOC_DEFS_H_ */ diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h index 4bea447c59..d87c859efa 100644 --- a/src/soc/intel/skylake/include/soc/usb.h +++ b/src/soc/intel/skylake/include/soc/usb.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _SOC_USB_H_ #define _SOC_USB_H_ diff --git a/src/soc/intel/skylake/include/soc/vr_config.h b/src/soc/intel/skylake/include/soc/vr_config.h index 2a30ae47f1..5207af85c4 100644 --- a/src/soc/intel/skylake/include/soc/vr_config.h +++ b/src/soc/intel/skylake/include/soc/vr_config.h @@ -80,7 +80,6 @@ enum vr_domain { [VR_GT_SLICED] = VR_CFG_MOHMS(gt_sl), \ } - void fill_vr_domain_config(void *params, int domain, const struct vr_config *cfg); #endif diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 493a42f459..1b222f313c 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -10,7 +10,6 @@ #include <soc/me.h> #include <soc/pci_devs.h> - /* HFSTS1[3:0] Current Working State Values */ static const char *const me_cws_values[] = { [ME_HFS_CWS_RESET] = "Reset", diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 3aec51b216..05bd1f7730 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -19,7 +19,6 @@ #include <soc/systemagent.h> #include "chip.h" - static void update_save_state(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase, struct smm_relocation_params *relo_params) |