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authorGaggery Tsai <gaggery.tsai@intel.com>2017-09-20 22:46:39 +0800
committerAaron Durbin <adurbin@chromium.org>2017-09-22 05:33:00 +0000
commite2592be952e12418ef0b701121a7873d4cd4ca5a (patch)
tree61e6ccf7cf34ceec075c6903084a9c79786bf9fc /src/soc/intel/skylake
parentcbe8c58e07d1b52cac75f356edfc1cfcad4171da (diff)
soc/intel/skylake: add Kabylake Celeron base SKU
This patch adds the support for Kabylake Celeron base SKU with PCH ID 0x9d50. BRANCH=none BUG=b:65709679 TEST=Ensure coreboot could recognize the Kabylake Celeron base SKU and boot into OS. Change-Id: I9c6f7bf643e0dbeb132fb677fcff461244101a55 Signed-off-by: Tsai, Gaggery <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/21617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: David Wu <david_wu@quantatw.com> Reviewed-by: T.H. Lin <T.H_Lin@quantatw.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/bootblock/report_platform.c2
-rw-r--r--src/soc/intel/skylake/lpc.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index e7fbb8a08f..69484fbb8e 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -76,6 +76,8 @@ static struct {
"Kabylake-Y iHDCP 2.2 Premium" },
{ PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22,
"Kabylake-U iHDCP 2.2 Premium" },
+ { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22,
+ "Kabylake-U iHDCP 2.2 Base" },
};
static struct {
diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c
index 6e7b19766e..295dace34f 100644
--- a/src/soc/intel/skylake/lpc.c
+++ b/src/soc/intel/skylake/lpc.c
@@ -328,6 +328,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM,
PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22,
PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22,
+ PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22,
0
};