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author | Nick Vaccaro <nvaccaro@google.com> | 2020-10-02 12:59:43 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-12 08:38:27 +0000 |
commit | 6745056a06fa2e69cc23bc797a7a69bb6c0e2b58 (patch) | |
tree | a5d4cf67bf0dd156ca792dfb5c23a52943b22fd7 /src/soc/intel/skylake | |
parent | 1f8af4f49b9556eb5540948f664549c07af58ef4 (diff) |
util: Add DDR4 generic SPD for H5ANAG6NCJR-XNC
Add SPD support for DDR4 memory part H5ANAG6NCJR-XNC.
BUG=b:161772961
TEST=none
Change-Id: I71e4de9a28f78bbf8c7de1fcafa3596276a5f2f9
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions