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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-04 19:54:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-07 05:47:33 +0000
commitb2a5f0b9c2eb79f1a9d4fe4f87f1460c1be7fa6d (patch)
tree37b8bd523e8a672853bba15804cb161278824693 /src/soc/intel/skylake
parentfe481eb3e5e8e8d39d892bfcfe085bc7d49ff886 (diff)
cpu/x86/smm: Promote smm_subregion()
No need to limit these declarations to FSP. Both PARALLEL_MP_INIT smm_relocate() and TSEG_STAGE_CACHE can be built on top of this. Change-Id: I7b0b9b8c8bee03aabe251c50c47dc42f6596e169 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/include/soc/smm.h2
-rw-r--r--src/soc/intel/skylake/memmap.c2
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index 0c5e9766c0..1000ce830c 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -19,7 +19,7 @@
#include <stdint.h>
#include <cpu/x86/msr.h>
-#include <fsp/memmap.h>
+#include <cpu/x86/smm.h>
#include <intelblocks/smihandler.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index 7a39b6748a..f69a88b30f 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -18,9 +18,9 @@
#include <device/mmio.h>
#include <cbmem.h>
#include <console/console.h>
+#include <cpu/x86/smm.h>
#include <device/device.h>
#include <device/pci.h>
-#include <fsp/memmap.h>
#include <intelblocks/ebda.h>
#include <intelblocks/systemagent.h>
#include <soc/msr.h>
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index bb86c6300d..b3781e2a65 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -18,11 +18,11 @@
#include <assert.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
+#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <fsp/util.h>
-#include <fsp/memmap.h>
#include <intelblocks/pmclib.h>
#include <memory_info.h>
#include <smbios.h>